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ise_c8051
- r8051(c8051)IP源码,使用VHDL编写。整个工程通过ISE13.2实现,附带完整testbench,并实例化了rom和ram,可以运行c代码。工程内包含modelsim的仿真脚本,可以观测程序运行时的内部硬件工作情况。-r8051 (c8051) IP source code, the use of VHDL. The whole project is realized by ISE13.2, with complete testbench, and examples of the
8051
- VHDL语言编写的SW8051IP核,并加入ROM,RAM,RAMX,PLL模块,可下载HEX文件并验证成功-VHDL language SW8051IP nuclear and add ROM, RAM, RAMX, PLL modules, you can download the HEX file and verify success
testrom
- My Uploaded Code to test ROM using VHDL.
ReaddataRom
- 本程序用VHDL语言实现了对ROM中所存数据的读取,对初学者很有用-This code written by VHDL,which can read data from ROM ,is helpful to beginner.
AAA
- 设计了一个16x8的ROM,采用VHDL语言。采用case语句,通过数码管输出高低地址数值。-The design of a 16x8 ROM, using VHDL language. Using case statements, through the digital output level address value.
dds_
- 基于VHDL的DDS 串口控制 ROM 文件由MATLAB生成-dds using VHDL serial control
CPU
- 我是2014级复旦的研究生。这是一个8位的CPU设计VHDL实现。本CPU基于RISC架构,实现了cpu的基本功能如:加减乘除运算,跳转等。此外,里面有一个17位的ROM区,是存储指令的。你可以写出一段17位的指令代码,并放入ROM区,该CPU即可自动运行出结果。压缩包里是源代码和我们当时的设计要求。本源代码的最后调试时在地址0 17是放入的斐波纳契数字(Fibonacci Numbers)指令。通过modelsim仿真即可看到结果。-I am a 2014 graduate of Fudan
zxb
- 利用VHDL语言编程产生正弦信号,熟悉介绍了LPM_ROM与FPGA硬件资源的使用方法,包括仿真和资源利用情况了解,包括SignalTap II测试、FPGA中ROM的在系统数据读写测试和利用示波器测试。完成了配置器件的编程。-Using VHDL language programming sinusoidal signal, using the method described LPM_ROM familiar with FPGA hardware resources, including s
DDS
- DDS的FPGA实现(VHDL),只可调频,调幅可于外部DA实现。(内附三角波、正弦波、方波的rom调用)-DDS on FPGA (VHDL), only FM, AM can be implemented in an external DA. (With triangular wave, sine wave, square wave rom call)
SOC_Code
- 加法器,原码补码乘法器,ROM设计,PC计数器等的VHDL详细代码-The source-code complement adder, multiplier, ROM design, such as PC counter of VHDL code in detail
VGA_rom_27704167
- vhdl (ps2接口) 实现rom 读取 -vhdl (ps2) for rom
VHDL_RAM_FIFO_ROM
- VHDL代码实现FIFO从ROM中读取数据然后传输到RAM中-VHDL code for FIFO read data ROM to RAM and then transfer
clamped_beam_in_VHDL-AMS-master
- System Level Model of MEMS Clamped-Clamped Beam in VHDL-AMS generated by ANSYS ROM Tool
vhdl__example_fza.ir
- useful vhdl example contain adder-mux-counter-ram-shifter-rom-flipflop-useful vhdl example contain adder-mux-counter-ram-shifter-rom-flipflop...
MakeImageData
- 用Delphi来发生彩色LED显示屏的资料。在VHDL固件里,保存这个资料作为mif样式到ROM架构。终于FPGA芯片显示静止图像在LED屏幕。(We developed Delphi application. This application generate initial data of VHDL firmware. This data has a <*.mif> style. FPGA chip using this initial data displays still